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Solid State Drive Primer # 3 - NAND Architecture - Strings and Arrays

This is Blog #3 of 13 in our Solid State Drives 101 educational series. If you're ready, continue to Blog #4: NAND Pages & Blocks.

The previous two solid state drive primers focused on the individual NAND Cell, whether used to store one, two or three bits. This article focuses on the bigger picture of how many NAND cells are combined into strings and arrays.

For a quick review, a single NAND flash cell stores an electrical charge on a floating gate which is isolated by oxide insulating layers above and below. In its simplest form when there is a charge on the floating gate it is programmed and recognized as a binary 0. When the floating gate has no charge it is erased and recognized as a binary value of 1.

Diagram of a Single NAND Flash Cell:

Combining Individual NAND Flash Cells into a String:

All by itself, a single flash cell would not be of much value. But combining many of them is what allows the storage of significant amounts of data. The first step in combining individual NAND cells is the NAND String.

The Image above shows the NAND String depicted in both a diagram form and in schematic form. Schematic form is typically used to show much larger arrays.

NAND cells are connected end to end to form a string of cells. Typically 32 or 64 cells are connected together in series with each other, with each cell representing a bit of data (0 or 1).

Combining NAND Strings into Arrays:

While a NAND String can store 32 bits of data, this still only translates into 4 bytes of data or enough for 4 characters. So, strings are combined into larger arrays to achieve some useful amounts of storage.

The Image above shows the NAND String schematic repeated several times in an array. Notice the additional connections made to the NAND strings which serve to tie the array together. The red line connects the Sources (S) of the individual strings.

The yellow lines connect the Control Gates of the NAND strings. In the array, the control gates are connected horizontally, but not vertically. In addition, the Drain (D) lines are not showing connections since they will be used separately in the array.

The next article will cover these items in more detail as we discuss the pages and block architecture of NAND Flash.

Feel free to leave a comment or contact us for more information.

Continue to Blog #4: NAND Pages & Blocks or learn all about Solid State Drives:

Steve Larrivee has over 30 year's experience in the data storage market, including 5 years at Seagate Technology and 10 years at SanDisk. He joined Cactus Technologies Limited as an equity partner and Co-Founded Cactus USA in 2007 with partner Tom Aguillon. Learn more about Steve on LinkedIn.

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